1. Field of the Invention
The present disclosure relates to liquid crystal display technology, and more particularly to an array substrate and a liquid crystal panel.
2. Discussion of the Related Art
Vertical alignment (VA) type liquid crystal panels are characterized by attributes such as quick response time and high contrastness, and thus are a current trend. However, as the effective reflective rates of the liquid crystal are not the same, the intensity of transmission lights may change. Specifically, the transmission rate is reduced when viewing at a squint angle. The color observed at the squint angle is different from that observed right ahead, which results in color shift. Especially, when the dimension of the liquid crystal panel grows, the color shift problem may get more and more serious at wide viewing angle.
FIG. 1 is an equivalent circuit diagram of one conventional array substrate. The array substrate includes scanning lines (Gn), data lines (Data), and pixel cells cooperatively defined by the scanning lines (Gn) and the data lines (Data). Each pixel cell includes an area “A” and an area “B”. The area “A” is driven by TFT_A, and the area “B” is driven by TFT_B. Under the same grayscale, different voltages are applied to the area “A” and the area “B” so as to obtain different Gamma curve. As such, the Gamma curve composited by the two areas has a smaller difference when observed right ahead and when observed at the wide viewing angle, which obviously enhances the color shift. Specifically, the plurality of scanning lines are scanned in turn. When the n-th scanning line is scanned, the scanning signals are inputted to the scanning line (Gn) to turn on the TFT_A and TFT_B. The data lines (Data) charges a storage capacitor (Cst) and a liquid crystal capacitor (Clc) in the area “A” and the area “B” of the pixel cells. Pixel voltages of the area “A” and the area “B” are charged to reach the voltage of the data lines (Data). When the (n+1)-th scanning line is scanned, the scanning signals are inputted to the scanning line (Gn+1) to turn on the TFT_C1. The pixel voltage of the area “B” is changed due to the capacitor (Cs1) such that the pixel voltage of the area “A” is different from that of the area “B” to achieve low color shift effect.
As shown in FIG. 1, ΔV1 represents the voltage difference between the pixel voltage and the common electrode of the area “A”. ΔV2 represents the voltage difference between the pixel voltage and the common electrode of the area “B”. The ratio of ΔV1 to ΔV2, as shown in the equation below, is a key design parameter:
            Δ      ⁢                          ⁢              V        1                    Δ      ⁢                          ⁢              V        2              =            (              Cst_B        +        Clc_B            )        /          (              Cst_B        +        Clc_B        +                  2          ⁢                                          ⁢          Cs          ⁢                                          ⁢          1                    )      
The capacitance value of the capacitor (Cs1) determines the ratio
            Δ      ⁢                          ⁢              V        1                    Δ      ⁢                          ⁢              V        2              .The structure of capacitor (Cs1) is shown in FIG. 2(a). M1 and M2 are metallic layers, SiNx is an insulation layer, and AS (a-si) is a semiconductor layer. M2 metallic layer connects to the TFT_C1. M1 metallic layer connects to the common electrode. The C-V cure of the capacitor is shown in FIG. 2(b), and the characteristic resides in that capacitance value for the positive half cycle is larger than that for the negative half cycle. Ideally,
      Δ    ⁢                  ⁢          V      1            Δ    ⁢                  ⁢          V      2      is the same regardless of when the positive polarity is inversed, i.e., the data voltage is larger than the voltage of the common electrode, or when the negative polarity is inversed, i.e., the data voltage is smaller than the voltage of the common electrode. Nevertheless, the capacitance value of the capacitor (Cs1) is larger when the positive polarity is inversed, which results in a smaller
            Δ      ⁢                          ⁢              V        1                    Δ      ⁢                          ⁢              V        2              .That is, the ratio VB/VA is not the same for the conditions when the positive or the negative polarity is inversed. As a result, the low color shift effect is decreased when the viewing angle is large. Also, the “burn-in” effect may occur at the same time.